/****************************************************************************
 * sram_tb.v
 ****************************************************************************/
`include "../sram/sram_t.v"

/**
 * Module: sram_t_tb
 * 
 * sram模块的测试文件
 */
 
`timescale 1ns / 10ps

module sram_t_tb;

	parameter ADDR_WIDTH = 10;
	parameter DATA_WIDTH = 32;
	parameter PERI = 10;
	
	reg						wr;
	reg						rst;
	reg						clk;
	reg	[ADDR_WIDTH-1 : 0]	addr;
	reg	[DATA_WIDTH-1 : 0]	din;
	
	sram_t sram_inst (
		.wr(wr),
		.rst(rst),
		.addr(addr),
		.din(din)
	);
		
	always #(PERI/2) clk = ~clk;

	initial
	begin
		$dumpfile("sram_t_tb.vcd");
        $dumpvars(0, sram_t_tb);

		wr 		= 'b0;
		rst 	= 1'b1;
		clk     = 1'b0;
		addr	= 'd0;
		din		= 'd0;

		// 复位
		#PERI;
		rst		= 'b0;
		wr 		= 'b1;
		addr	= 'd1;
		din		= 'd11;
		
		
		#PERI $finish;

	end
	
endmodule


